Sr. DRAM Applications Engineer

Overview

We are seeking a highly skilled DRAM Applications Engineer with expertise in high-performance high-capacity DRAM modules to join our team. This role involves working closely with customers R&D and test engineering teams to optimize the performance reliability and interoperability of high-performance DRAM modules.

As a key technical expert you will analyze customer issues conduct in-depth failure analysis and optimize stress test methodologies to improve DRAM module performance and quality.

Responsibilities

• Act as the technical liaison between customers and internal teams for DRAM module applications reliability and failure analysis.
• Develop and implement stress test strategies for high-performance DRAM modules .
• Perform failure analysis (FA) and root cause investigations for customer-reported issues RMA returns and system-level failures.
• Debug memory training failures DIMM timing margin issues and memory controller interactions in high-speed computing environments.
• Collaborate with R&D to investigate intermittent failures and memory errors caused by power integrity (PI) signal integrity (SI) and thermal stress .
• Provide technical support to customers including on-site debugging system-level failure analysis and troubleshooting of DRAM module integration issues.
• Work with ATE (Automated Test Equipment) and their manufacturers to validate high-speed memory interfaces .
• Utilize industry standard failure analysis techniques to determine failure root causes at the chip and module level .
• Generate detailed reports (8D) and presentations summarizing failure analysis findings root causes and recommendations for product and process improvements.

Qualifications

• Bachelors or Masters degree in Electrical Engineering or a related field.
• 5 years of experience in DRAM module applications engineering and failure analysis .
• Strong understanding of high-performance memory interfaces (DDR4 DDR5 HBM) and server memory architectures .
• Strong problem-solving skills with experience in root cause failure analysis in high-performance computing environments .
• Expertise in server memory modules and system-level debugging.
• Experience with high-frequency test equipment such as oscilloscopes and TDRs .
• Familiarity with JEDEC DRAM standards ECC error handling and memory RAS (Reliability Availability and Serviceability) features .
• Familiarity with BIOS tuning memory controller optimizations and DRAM memory training algorithms.
• Proficiency in data analysis and scripting .
• Excellent communication skills with the ability to explain complex technical concepts effectively to non-technical audiences.
• Excellent interpersonal skills for cross-functional team interaction.

Location

This opportunity is in Newark California.

Travel

Willingness to travel occasionally to customer sites and industry events as needed.

The base pay range that the Company reasonably expects to pay for this position in California is $140000 - $170000; the pay ultimately offered may vary based on business considerations including job-related knowledge skills experience and position is bonus-eligible and there are medical dental and vision benefits available. There is a 401k saving plan and other benefits such as Paid Time Off Life Insurance and an Employee Assistance Plan.

Inclusion & Belonging Statement

We are committed to creating an inclusive environment that embraces differences and fosters belonging for all.

Equal Opportunity Statement

We are an Affirmative Action/Equal Opportunity Employer and strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age national origin race ethnicity creed gender disability veteran status or any other characteristic protected by law.

Required Experience:

Senior IC